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1 ISL32173E, isl32175e, isl32177e, isl32273e, isl 32275e, isl32277e quad, 16.5kv esd protected, 3.0v to 5.5v, rs-485/rs-422 receivers ISL32173E, isl321 75e, isl32177e, is l32273e, isl32275e, isl32277e these intersil devices are 16.5kv iec61000-4-2 esd protected, 3.0v to 5.5v powered, quad receivers for balanced communication using the rs-485 and rs-422 standards. each receiver has low input currents ( 200a), so it presents a 1/4 unit load to the rs-485 bus, and allows up to 128 receivers on the bus. the ISL32173E, isl32175e, isl32177e are high data rate receivers that operate at data rates up to 80mbps. their 8ns maximum propagation delay skew (tolerance) guarantees excellent part-to-part matching. the isl32273e, isl32275e, isl32277e are reduced supply current versions that operate at data rates up to 20mbps. receiver outputs are tri-statable, and incorporate a hot plug feature to keep them disabled during power up and down. versions are available with a common en/en (?173 pinout), a two channel en12/en34 (?175 pinout), or a versatile individual channel enable (see table 1). a 26% smaller footprint is available with the isl32177e and isl32277e qfn packages, and these two devices also feature a logic supply pin (v l ). the v l supply sets the switching points of th e enable inputs, and the receiver outputs? v oh , to levels compatible with a lower supply voltage in mixed voltage systems. individual channel and group enable pins increase the isl32177e and isl32277e?s flexibility. features ? iec61000 esd protection (rs-485 inputs) 16.5kv - class 3 esd on all other pins . . . . . . >8kv hbm ? wide supply range. . . . . . . . . . . . . 3.0v to 5.5v ? wide common mode range . . . . . . . -7v to +12v ? low part-to-part propagation delay tolerance. . . . . . . . . . . . . . . . . . . . 4ns (max) ? specified for +125 c operation ? fail-safe open rx inputs ? 1/4 unit load allows 128 devices on the bus ? available in industry standard pinouts (?173/?175) and a 4x4 qfn (isl32x77e) with added features ? logic supply pin (v l ) eases operation in mixed supply systems (isl32x77e) ? high data rates . . . . . . . . . up to 80m or 20mbps ? low shutdown supply current . . . . . . . . . . 60a ? tri-statable rx outputs ? 5v tolerant logic inputs when v cc = 3.3v applications ? telecom equipment ? motor controllers/encoders ? programmable logic controllers ? industrial/process control networks isl32177e part-to-part prop delay variability isl3217xe data rate and v l performance receiver propagation delay (ns) frequency 9.67 9.80 9.92 10.04 10.17 10.29 10.41 10.54 10.66 10.78 10.91 11.03 11.15 11.28 11.40 11.52 v cc = 3.3v, +25c # of devices = 270 time (4ns/div) receiver output (v) 1 -1 0 receiver input (v) a - b v cc = 3.3v -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 v l = 2.5v v l = 1.8v v l = 1.6v 80mbps march 14, 2013 fn7529.1 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas llc 2009, 2013. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners.
2 fn7529.1 march 14, 2013 table 1. summary of features part number function data rate (mbps) hot plug? v l supply pin? rx enable type max. total supply current (ma) low power shutdown? pin count ISL32173E 4 rx 80 yes no en, en 15 yes 16 isl32175e 4 rx 80 yes no en12, en34 15 yes 16 isl32177e 4 rx 80 yes yes individual and group enables 15 yes 24 isl32273e 4 rx 20 yes no en, en 5.5 yes 16 isl32275e 4 rx 20 yes no en12, en34 5.5 yes 16 isl32277e 4 rx 20 yes yes individual and group enables 5.5 yes 24 pin configurations ISL32173E, isl32273e (16 ld n-soic, 16 ld tssop) top views isl32175e, isl32275e (16 ld n-soic, 16 ld tssop) top views isl32177e, isl32277e (24 ld qfn) top view 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 b1 a1 ro1 en ro2 a2 gnd b2 v cc a4 ro4 en ro3 a3 b3 b4 r r r r 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 b1 a1 ro1 en12 ro2 a2 gnd b2 v cc a4 ro4 en34 ro3 a3 b3 b4 r r r r a1 b1 v cc v l b4 a4 a2 b2 shdnen gnd b3 a3 ro1 en1 en2 en nc ro2 ro4 en4 en3 en nc ro3 1 2 3 4 5 6 18 17 16 15 14 13 24 23 22 21 20 19 789101112 r r r r pad (gnd) ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
3 fn7529.1 march 14, 2013 pin descriptions ISL32173E, isl32273e pin number isl32175e, isl32275e pin number isl32177e, isl32277e pin number pin function 4, 12 - 4, 15 en, en group driver output enables, that are internally pulled high to v cc . all receiver outputs are enab led by driving en high or en low, and the outputs are all high impedance when en is low and en is high (i.e., if using only the active high en, connect en to v cc or v l through a 1k resistor; if using only the active low en , connect en directly to gnd). if the group enable function isn?t required, connect en to v cc (or v l ) through a 1k or greater resistor, or connect en directly to gnd. (isl32x73e and isl32x77e only) - 4, 12 - en12, en34 paired driver output enab les, that are internal ly pulled high to v cc . driving en12 (en34) high enables the channel 1 and 2 (3 and 4) ro outputs. driving en12 (en34) low disables the channel 1 and 2 (3 and 4) outputs. if the enable function isn?t required, connect en12 and en34 to v cc (or v l ) through a 1k or greater resistor. (isl32x75e only). - - 2, 3, 16, 17 en1, en2, en3, en4 individual receiver outp ut enables that are in ternally pulled high to v cc . forcing enx high (along with en high or en low) enables the channel x output (rox). driving enx low disables the channel x output, regardless of the states of en and en . if the individual channel enable function isn?t required, connect enx to v cc (or v l ) through a 1k or greater resistor . (isl32x77e only) - - 9 shdnen low power shdn mode enable that is internally pulled high to v cc . a high level allows the isl32x77e to enter a low power mode when all channels are disabled. a low level prevents the device from entering the low power mode. (isl32x77e only) 3, 5, 11, 13 3, 5, 11, 13 1, 6, 13, 18 ro1, ro2, ro3, ro4 channel x receiver output: if a - b 200mv, ro is high; if a - b -200mv, ro is low. ro = high if a and b are unconnected (floating). 8 8 10, pad gnd ground connection. this is also the potential of the qfn thermal pad. 2, 6, 10, 14 2, 6, 10, 14 24, 7, 12, 19 a1, a2, a3, a4 16.5kv iec61000-4-2 esd protected rs-485/422 level, channel x noninverting receiver input. 1, 7, 9, 15 1, 7, 9, 15 23, 8, 11, 20 b1, b2, b3, b4 16.5kv iec61000-4-2 esd protected rs-485/422 level, channel x inverting receiver input. 16 16 22 v cc system power supply input (3.0v to 5.5v). on devices with a v l pin powered from a separate supply, power up v cc first. --21v l logic power supply input (1.4v to v cc ) that powers all the ttl/cmos inputs and outputs (logic pins). v l sets the v ih and v il levels of the enable and shdnen pins, and sets the v oh level of the ro pins. connect the v l pin to the lower voltage power supply of a logic device (e.g., uart or controller) interfacing with the isl32x77e logic pins. if v l and v cc are different supplies, power up this supply after v cc , and keep v l v cc . to minimize input current and shdn supply current, logic pins that are strapped high externally (preferably through a 1k resistor) should connect to v cc , but they may also connect to v l . (isl32x77e only) - - 5, 14 nc no connection. ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
4 fn7529.1 march 14, 2013 ordering information part number (notes 1, 2, 3) part marking temp. range (c) package (pb-free) pkg. dwg. # ISL32173Eibz isl32173 eibz -40 to +85 16 ld soic m16.15 ISL32173Efbz isl32173 efbz -40 to +125 16 ld soic m16.15 ISL32173Eivz 32173 eivz -40 to +85 16 ld tssop mdp0044 ISL32173Efvz 32173 efvz -40 to +125 16 ld tssop mdp0044 isl32175eibz isl32175 eibz -40 to +85 16 ld soic m16.15 isl32175efbz isl32175 efbz -40 to +125 16 ld soic m16.15 isl32175eivz 32175 eivz -40 to +85 16 ld tssop mdp0044 isl32175efvz 32175 efvz -40 to +125 16 ld tssop mdp0044 isl32177eirz 321 77eirz -40 to +85 24 ld qfn l24.4x4c isl32177efrz 321 77efrz -40 to +125 24 ld qfn l24.4x4c isl32273eibz isl32273 eibz -40 to +85 16 ld soic m16.15 isl32273efbz isl32273 efbz -40 to +125 16 ld soic m16.15 isl32273eivz 32273 eivz -40 to +85 16 ld tssop mdp0044 isl32273efvz 32273 efvz -40 to +125 16 ld tssop mdp0044 isl32275eibz isl32275 eibz -40 to +85 16 ld soic m16.15 isl32275efbz isl32275 efbz -40 to +125 16 ld soic m16.15 isl32275eivz 32275 eivz -40 to +85 16 ld tssop mdp0044 isl32275efvz 32275 efvz -40 to +125 16 ld tssop mdp0044 isl32277eirz 322 77eirz -40 to +85 24 ld qfn l24.4x4c isl32277efrz 322 77efrz -40 to +125 24 ld qfn l24.4x4c notes: 1. add ?-t? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin pl ate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see device information page for ISL32173E ,isl32175e ,isl32177e ,isl32273e , isl32275e , isl32277e . for more information on msl please see tech brief tb363 . truth tables receiver output (rox enabled, all versions) inputs (a-b) output (ro) 0.2v 1 -0.2v 0 inputs open (floating) 1 receiver enable (ISL32173E, isl32273e) inputs outputs en en rox x0 enabled 1x enabled 01 disabled* note: *low power shdn mode when disabled ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
5 fn7529.1 march 14, 2013 truth tables (continued) receiver enable (isl32175e, isl32275e) inputs outputs en12 en34 ro1 ro2 ro3 ro4 0 0 z* z* z* z* 01zzenen 1 0 en en z z 1 1 en en en en note: *low power shdn mode when all outputs disabled; z=tri-state receiver enable (isl32177e, isl32277e) inputs outputs enx en en shdnen rox comments 0 x x 0 z chan x output disabled en1-4 = 0 x x 1 z* all outputs disabled x 0 1 0 z all outputs disabled x 0 1 1 z* all outputs disabled 1x0xenindividual enx controls chan 11xxen note: * low power shdn mode; z = tri-state typical operating circuits (1 of 4 channels shown) network using group enables network using paired enables 0.1f + r 2 1 16 3 12 8 v cc gnd ro en b a +3.3v to 5v 0.1f + d v cc gnd en di z y r t +3.3v to 5v isl32x73e isl32x72e 1 4 8 3 2 16 en 12 1k en 4 0.1f + r 2 1 16 3 8 v cc gnd ro1 b1 a1 +3.3v to 5v 0.1f + d v cc gnd en12 di1 z1 y1 r t +3.3v to 5v isl32x75e isl32x74e 1 8 3 2 4 en12 16 4 ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
6 fn7529.1 march 14, 2013 network with v l pin for interfacing to lower voltage logic devices typical operating circuits (1 of 4 channels shown) (continued) 0.1f + r 24 23 22 1 2 10 v cc gnd ro1 en1 b1 a1 +3.3v to 5v 0.1f + d 1 24 21 4 23 9 v cc gnd en di z y r t +3.3v to 5v isl32x77e isl32179e 20 v l +2.5v 21 v l +1.8v v cc logic device (p, asic, uart) v cc logic device (p, asic, uart) 2, 3, 15, 16 en1-en4 14 en 22 shdnen 1k 1k 4 en 15 en 9 shdnen using individual channel enables and configured for lowest shdn supply current using active high group enable and configured for lowest shdn supply current note: if powered from separate supplies, note: if powered from separate supplies, power up v cc before v l power up v cc before v l ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
7 fn7529.1 march 14, 2013 absolute maximum ratings thermal information v cc to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7v v l to gnd (note 4) . . . . . . . . . . . . . . -0.3v to (v cc +0.3v) input voltages en (all varieties) . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v a, b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9v to +13v output voltages ro (note 5) . . . . . . . . . . . . . . . . . -0.5v to (v cc + 0.3v) ro (note 4) . . . . . . . . . . . . . . . . . . -0.5v to (v l + 0.3v) short circuit duration ro (one output at a time) . . . . . . . . . . . . . . . indefinite esd rating . . . . . . . . . see ?electrical specifications? table thermal resistance (typical) ja (c/w) jc (c/w) 16 ld soic package (notes 6, 9). . 78 30 16 ld tssop package (notes 6, 9) 104 25 24 ld qfn package (notes 7, 8) . . 42 5 maximum junction temperature (plastic package) . . +150c maximum storage temperature range . . . . -65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/pb-freereflow.asp recommended operating conditions supply voltages v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3v to 5.5v v l (note 4) . . . . . . . . . . . . . . . . . . . . . . . . . 1.6v to v cc temperature range isl32x7xei . . . . . . . . . . . . . . . . . . . . . .-40c to +85c isl32x7xef . . . . . . . . . . . . . . . . . . . . . -40c to +125c bus pin common mode voltage range . . . . . . . -7v to +12v ro output current . . . . . . . . . . . . . . . . . . . -9ma to +9ma ro load capacitance . . . . . . . . . . . . . . . . . . . . . . . . 6pf caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. isl32177e and isl32277e only. 5. excluding the isl32177e and isl32277e. 6. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 7. ja is measured in free air with the component mounted on a high effective thermal conductivity test board with ?direct attach? features. see tech brief tb379 for details. 8. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. 9. for jc , the ?case temp? location is taken at the package top center. electrical specifications tes t c on di t io ns : v cc = 3.0v to 5.5v; v l = v cc (isl32177e and isl32277e on ly); typicals are at the worst case of v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified. boldface limits apply over the oper ating temperature range. (notes 10, 14) parameter symbol test conditions temp (c) min (note 13) typ max (note 13) units dc characteristics input high voltage (logic pins, note 17) v ih1 v l = v cc if isl32177e or isl32277e v cc 3.6v full 2 --v v ih2 v cc 5.5v full 2.2 --v v ih3 2.7v v l < 3.0v (isl32177e and isl32277e only) full 2 --v v ih4 2.3v v l < 2.7v (isl32177e and isl32277e only) full 1.6 --v v ih5 1.6v v l < 2.3v (isl32177e and isl32277e only) full 0.72*v l --v v ih6 1.4v v l < 1.6v (isl32177e and isl32277e only) 25 - 0.4*v l -v input low voltage (logic pins, note 17) v il1 v l = v cc if isl32177e and isl32277e full - - 0.8 v v il2 v l 2.7v (isl32177e and isl32277e only) full - - 0.6 v v il3 2.3v v l < 2.7v (isl32177e and isl32277e only) full - - 0.6 v v il4 1.6v v l < 2.3v (isl32177e and isl32277e only) full - - 0.22*v l v v il5 1.4v v l < 1.6v (isl32177e and isl32277e only) 25 0.35* v l -v ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
8 fn7529.1 march 14, 2013 logic input current i in1 en, en , enx, shdnen = 0v or v cc full -15 - 15 a i in2 en12, en34 = 0v or v cc (isl32x75e only) full -30 - 30 a receiver differential threshold voltage v th -7v v cm 12v full -200 - 200 mv receiver input hysteresis v th v cm = 0v 25 - 30 - mv input current (a, b) i in3 v cc = 0v or 5.5v v in = 12v full - - 0.2 ma v in = -7v full -0.2 --ma receiver input resistance r in -7v v cm 12v full 48 --k receiver output leakage current i oz en = 0v, 0 v o v cc (0 to v l if isl32177e or isl32277e) full -10 - 10 a receiver short- circuit current, v o =high or low i os en = 1, 0v v o v cc (0 to v l if isl32177e or isl32277e) 20mbps versions full - - 100 ma 80mbps versions full - - 155 ma receiver output high voltage v oh1 i o = -8ma, v id = 200mv (v l = v cc if isl32177e or isl32277e) v cc 4.5v full v cc - 1 --v i o = -6ma, v id = 200mv (v l = v cc if isl32177e or isl32277e) v cc 3.0v full 2.4 --v v oh2 i o = -2ma, v l 2.3v isl32177e and isl32277e only full v l - 0.3 --v v oh3 i o = -1.5ma, v l = 1.8v full v l - 0.3 --v v oh4 i o = -200a, v l 1.4v full v l - 0.2 --v receiver output low voltage v ol1 i o = 8ma, v id = -200mv, v l = v cc if isl32177e, isl32277e full - - 0.4 v v ol2 i o = 5ma, v l 1.8v isl32177e and isl32277e only full - - 0.4 v v ol3 i o = 2ma, v l 1.4v isl32177e and isl32277e only full - - 0.4 v supply current no-load supply current, 80mbps versions 80i cc en = 1, or en = 0 (ISL32173E and isl32177e), or en12 = en34 = 1 (isl32175e), or en1 = en2 = en3 = en4 = 1 (isl32177e) full - - 15 ma 80i cc1/2 en12 = 1 and en34 = 0, or vice versa (isl32175e only), or if only two channels are enabled on the isl32177e full - - 8.5 ma 80i ccd shdnen = 0, en1 = en2 = en3 = en4 = 0 or en = 0 and en = 1 (isl32177e only) full - - 2.5 ma electrical specifications tes t c on di t io ns : v cc = 3.0v to 5.5v; v l = v cc (isl32177e and isl32277e on ly); typicals are at the worst case of v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified. boldface limits apply over the oper ating temperature range. (notes 10, 14) (continued) parameter symbol test conditions temp (c) min (note 13) typ max (note 13) units ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
9 fn7529.1 march 14, 2013 no-load supply current, 20mbps versions 20i cc en = 1, or en = 0 (isl32273e and isl32277e), or en12 = en34 = 1 (isl32275e), or en1 = en2 = en3 = en4 = 1 (isl32277e) full - - 5.5 ma 20i cc1/2 en12 = 1 and en34 = 0, or vice versa (isl32275e only), or if only two channels are enabled on the isl32277e full - - 3.5 ma 20i ccd shdnen = 0, en1 = en2 = en3 = en4 = 0 or en = 0 and en = 1 (isl32277e only) full - - 1.2 ma shutdown supply current i shdn all outputs disabled (note 18) (all except isl32x75e) full - - 15 a all outputs disabled (note 19) (all except isl32x73e) full - - 60 a esd performance rs-485 pins (a, b) iec61000-4-2, from bus pins to gnd air gap 25 - 16.5 - kv contact 25 - 8 - kv human body model, from bus pins to gnd 25 - 15 - kv all pins hbm 25 - 8 - kv machine model 25 - 500 - v receiver switching characteristics (isl32273e, isl32275e, isl32277e, 20mbps) maximum data rate f max v id = 1.5v, c l =15pf full 20 - - mbps receiver input to output delay t plh , t phl (figure 1) full - 37 55 ns receiver skew | t plh - t phl | t skd (figure 1) full - 2.7 6 ns prop delay skew chan-to-chan t skc-c (figure 1), (note 11) full - 3 8 ns prop delay skew part-to-part t skp-p (figure 1), (note 12) full - 4 20 ns receiver enable to output high t zh r l = 1k , c l = 15pf, sw = gnd (figure 2), (notes 15, 21) full - 150 190 ns receiver enable to output low t zl r l = 1k , c l = 15pf, sw = v cc (figure 2), (notes 15, 21) full - 155 190 ns receiver disable from output high t hz r l = 1k , c l = 15pf, sw = gnd (figure 2) full - 19 30 ns receiver disable from output low t lz r l = 1k , c l = 15pf, sw = v cc (figure 2) full - 19 30 ns receiver enable from shutdown to output high t zh(shdn) r l = 1k , c l = 15pf, sw = gnd (figure 2), (notes 16, 20) full - - 850 ns receiver enable from shutdown to output low t zl(shdn) r l = 1k , c l = 15pf, sw = v cc (figure 2), (notes 16, 20) full - - 850 ns receiver switching characteristics (ISL32173E, isl32175e, isl32177e, 80mbps) maximum data rate f max v id = 1.5v, c l 15pf v cc 3.6v full 80 - - mbps v cc > 3.6v full 20 - - mbps v id = 1.5v, c l 6pf, 3.6v v cc 5.5v full 80 - - mbps electrical specifications tes t c on di t io ns : v cc = 3.0v to 5.5v; v l = v cc (isl32177e and isl32277e on ly); typicals are at the worst case of v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified. boldface limits apply over the oper ating temperature range. (notes 10, 14) (continued) parameter symbol test conditions temp (c) min (note 13) typ max (note 13) units ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
10 fn7529.1 march 14, 2013 receiver input to output delay t plh , t phl (figure 1) full 7 11 16 ns receiver skew | t plh - t phl | t skd (figure 1) full - 0.4 2 ns prop delay skew chan-to-chan t skc-c (figure 1), (note 11) full - 0.7 4 ns prop delay skew part-to-part t skp-p (figure 1), (note 12) full - 1.2 8 ns receiver enable to output high t zh r l = 1k , c l = 15pf, sw = gnd (figure 2), (notes 15, 21) full - 57 75 ns receiver enable to output low t zl r l = 1k , c l = 15pf, sw = v cc (figure 2), (notes 15, 21) full - 59 75 ns receiver disable from output high t hz r l = 1k , c l = 15pf, sw = gnd (figure 2) full - 18 30 ns receiver disable from output low t lz r l = 1k , c l = 15pf, sw = v cc (figure 2) full - 19 30 ns receiver enable from shutdown to output high t zh(shdn) r l = 1k , c l = 15pf, sw = gnd (figure 2), (notes 16, 20) full - - 850 ns receiver enable from shutdown to output low t zl(shdn) r l = 1k , c l = 15pf, sw = v cc (figure 2), (notes 16, 20) full - - 850 ns notes: 10. all currents into device pins are positive; all currents out of device pins are nega tive. all voltages ar e referenced to dev ice ground unless otherwise specified. 11. channel-to-channel skew is the magnitude of the worst case delta between any two propagation delays of any two outputs on the same ic, at the same test conditions. 12. t skp-p is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (v cc , temperature, etc.). 13. parameters with min and/or max limits are 100% tested at +25c, unless otherwise specified. temperature limits established by characterization and are not production tested. 14. en = 0 indicates that the output(s) under test are disabled via the appropriate lo gic pin settings. en = 1 indicates that th e logic pins are set to enable the output(s) under test. 15. for isl32177e and isl32277e, keep shdnen low to avoid enteri ng shdn. for isl32175e and is l32275e ensure that at least one channel remains enabled to prevent shdn. 16. for isl32177e and isl32277e, keep shdnen high to enter shdn when all drivers are disabled. 17. logic pins are the enab le variants and shdnen. 18. en low and en high on the isl32x73e. shdnen, en , en1-en4 all high and en low on the isl32x77e. 19. en12 and en34 low on isl32x75e. shdnen high, with en1-en4 low plus en and en high on the isl32x77e. 20. shutdown is entered by simu ltaneously disabling all four outputs for at least 600ns. 21. does not apply to the ISL32173E nor the isl32273e; only the en from shdn parameters apply to these two parts. electrical specifications tes t c on di t io ns : v cc = 3.0v to 5.5v; v l = v cc (isl32177e and isl32277e on ly); typicals are at the worst case of v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified. boldface limits apply over the oper ating temperature range. (notes 10, 14) (continued) parameter symbol test conditions temp (c) min (note 13) typ max (note 13) units ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
11 fn7529.1 march 14, 2013 application information rs-485 and rs-422 are differential (balanced) data transmission standards for use in long haul or noisy environments. rs-422 is a subset of rs-485, so rs-485 transceivers are also rs-422 compliant. rs-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. rs-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. another important advantage of rs-485 is the extended common mode range (cmr), which specifies that the driver outputs and receiver inputs withstand signals that range from +12v to -7v. rs-422 and rs-485 are intended for runs as long as 4000?, so the wide cmr is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. receiver features these devices utilize differential receivers for maximum noise immunity and common mode rejection. input sensitivity is better than 200mv, as required by the rs-422 and rs-485 specifications. receiver input resistance of 48k surpasses the rs-422 specification of 4k and is four times the rs-485 ?unit load (ul)? requirement of 12k minimum. thus, these products are known as ?one-quarter ul? receivers and there can be up to 128 of these devices on a network while still complying with the rs-485 loading specification. receiver inputs function with common mode voltages as great as +9v/-7v outside the power supplies (i.e., +12v and -7v with v cc = 3.0v), making them ideal for long networks where induced voltages, and ground potential differences are realistic concerns. all the receivers include a ?fail-safe open? function that guarantees a high level receiv er output if the receiver inputs are unconnected (floating). all receivers easily support a 20mbps data rate, and the ISL32173E, isl32175e, and isl32177e support data rates up to 80mbps. all receiver outputs are tri-statable, with the enable scheme varying by part type (see next section). receiver enable functions all product types include functionality to allow disabling of the rx outputs. the isl32x73e types feature group (all four rx) enable functions that are active high (en) or active low (en ). receivers enable when en = 1, or when en = 0, and they disable only when en = 0 and en = 1. isl32x75e versions use active high paired enable test circuits and waveforms figure 1a. test circuit figure 1b. measurement points figure 1. receiver propagation delay figure 2a. test circuit figure 2b. measurement points figure 2. receiver enable and disable times signal generator r ro en a b +1.5v 15pf ro 3v 0v t plh 1.5v 1.5v v cc or v l 0v 50% t phl a 50% 1k v cc gnd sw parameter a sw t hz +1.5v gnd t lz -1.5v v cc t zh (notes 15, 21) +1.5v gnd t zl (notes 15, 21) -1.5v v cc t zh(shdn) (notes 16, 20) +1.5v gnd t zl(shdn) (notes 16, 20) -1.5v v cc signal generator r ro en a b gnd 15pf or v l ro 3v or v l 0v 1.5v 1.5v v oh 0v v oh - 0.5v t hz ro v cc or v l v ol v ol + 0.5v t lz en output low t zl , t zl(shdn) t zh , t zh(shdn) lower of lower of 1.5v or v l /2 output high 1.5v or v l /2 ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
12 fn7529.1 march 14, 2013 functions (en12 and en34) that enable (when high) or disable (when low) the corresponding pairs of rx. all four of these enable pins have internal pull-up resistors to v cc , but unused enable pins that need to be high (e.g., en when using the en input for enable control, or en12 and en34 when using always enabled receivers) should always be connected externally to v cc . if v cc transients might exceed 7v, then inserting a series resistor between the input(s) and v cc limits the current that flows if the input?s esd protection starts conducting. the isl32177e and isl32277e have the most flexible enable scheme. their six enable pins allow for group, paired, or individual channe l enable control. figure 3 details the isl32x77e?s internal enable logic. to utilize a group enable function, connect all the enx pins high, and handle the en and en pins as described in the previous paragraph. for paired enables, connect en and en high (for the lowest current in shdn mode, if shdn is used) and tie en1 and en2 together, and en3 and en4 together. for individual channel enables, again connect en and en high, and drive the appropriate enx (active high) for the particular channel. all six enable pins incorporate pull-up resistors to v cc , but unused enable pins of any type should be externally connected high, rather than being left floating. connecting to v cc is the best choice, but v l may be utilized as long as shdn power isn?t a primary concern (for each v l connected input, i cc increases by (v cc - v l )/600k ). if v cc or v l transients might exceed 7v, then inserting a series resistor between the input(s) and the supply limits the current that will flow if the input?s esd protection starts conducting. wide supply range the isl32x7xe design operates with a wide range of supply voltages from 3.0v to 5.5v, and the receivers meet the rs-485 specs for that full supply voltage range. 5.5v tolerant logic pins logic input pins (enables, shdnen) contain no esd nor parasitic diodes to v cc (nor to v l ), so they withstand input voltages exceeding 5.5v regardless of the v cc and v l voltages (see figure 6). logic supply (v l pin, isl32177e and isl32277e) note: if powered from separate supplies, power up v cc before powering up the v l supply. the isl32177e and isl32277e include a v l pin that powers the logic inputs (enables, shdnen) and the ro outputs. these pins interface with ?logic? devices such as uarts, asics, and controllers, and today most of these devices use power supplies significantly lower than 3.3v. thus, a 5v or 3.3v ro output level from an isl32x77e ic might seriously overdrive and damage the logic device input (figure 4). similarly, the logic device?s low v oh might not exceed the v ih of the isl32x77e?s 3.3v or 5v powered enable input. connecting the isl32x77e?s v l pin to the power supply of the logic device - as shown in figure 4 - limits the isl32x77e?s v oh to v l , and reduces its logic input switching points to values compatible with the logic device?s output levels. tailoring the logic pin input switching points and ro output levels to the supply voltage of the uart, asic, or controller eliminates the need for a level shifter/tran slator between the two ics. v l can be anywhere from v cc down to 1.4v, but the data rate drops off dramatically below v l = 1.6v. table 2 indicates typical v ih and v il values (applicable to both speed grades) for various v l settings, and also lists the isl32177e?s typical data rate versus v l . the isl32277e typically runs at 20mbps for v l 1.6v, and drops to 10mbps to 15mbps at v l =1.4v. prop delays, skews, and transition times increase at lower v l , as shown in figures 17 through 29. figure 3. isl32x77e enable logic 1 of 4 channels v cc v cc v cc enx en en chx en figure 4. using v l pin to adjust logic levels gnd r xd rxen v cc = +2v uart/processor gnd ro en v cc = +3.3v isl32x7xe v oh 2v v oh = 3.3v v ih 2v esd diode gnd r xd rxen v cc = +2v uart/processor gnd ro en v cc = +3.3v to 5v isl32x77e v oh 2v v oh = 2v v ih = 0.9v esd diode v l ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
13 fn7529.1 march 14, 2013 neglecting the ro i oh currents, the quiescent v l supply current (i l ) is typically less than 1a for enable input voltages at ground or v l , as shown in figure 6. enable pin pull-up resistors connect to v cc , so the current due to a low enable input adds to i cc rather than to i l . hot plug function when a piece of equipment powers up, there is a period of time where the processor or asic driving the rs-485 control lines (en, en , enx) is unable to ensure that the rs-485 rx outputs are kept disabled. if the equipment is connected to the bus, a receiver activating prematurely during power up may generate ro transitions that could cause interrupts. to avoid this scenario, this family incorporates a ?hot plug? function. during power up, circuitry monitoring v cc ensures that the rx outputs remain disabled for a period of time, regardless of the state of the enables. this gives the processor/asic a chance to stabilize and drive the rs-485 control lines to the proper states. esd protection all pins on these devices include class 3 (>8kv) human body model (hbm) esd protection structures, but the rs-485 pins (receiver inputs) incorporate advanced structures allowing them to survive esd events in excess of 15kv hbm, and 16.5kv iec 61000-4-2. the rs-485 pins are particularly vulnerable to esd damage because they typically connect to an exposed port on the exterior of the finished product. simply touching the port pins, or connecting a cable, can cause an esd event that might destroy unprotected ics. these new esd structures protect the device whether or not it is powered up, and without degrading the rs-485 common mode range of -7v to +12v. this built-in esd protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and the associated, undesirable capacitive load they present. iec 61000-4-2 testing the iec 61000 test method applies to finished equipment, rather than to an individual ic. therefore, the pins most likely to suffer an esd event are those that are exposed to the outside world (the rs-485 pins in this case), and the ic is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. the lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the hbm test. the extra esd protection built into this device?s rs-485 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the rs-485 port. air-gap discharge test method for this test method, a charged probe tip moves toward the ic pin until the voltage arcs to it. the current waveform delivered to the ic pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. the a and b rs-485 pins withstand 16.5kv air-gap discharges. contact discharge test method during the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. these quad receivers survive 8kv contact discharges on the rs-485 pins. data rate, cables, and terminations rs-485 and rs-422 are intended for network lengths up to 4000?, but the maximum system data rate decreases as the transmission length increases. networks operating at 80mbps are limited to lengths much less than 100? (30m), while a 20mbps version can operate at full data rates with lengths up to 200? (60m). any of these ics may be used at slower data rates over longer cables, but there are some limitations for the 80mbps versions. the 80mbps rx is optimized for high speed operation, so its output may glitch if the rx input differential transition times are too slow. keeping the transition times below 500ns, which equates to a tx driving a 1000? (305m) cat 5 cable, yields excellent performance over the full operating temperature range. twisted pair is the cable of choice for rs-485 and rs-422 networks. twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ics. when using these receivers, proper termination is imperative to minimize reflections. short networks using slew rate limited transmitte rs need not be terminated, but terminations are recommended unless power dissipation is an overriding concern. in point-to-point, or point-to-multipoint (single driver on a bus with multiple receivers) networks, the main cable should be terminated in its characteristic impedance (typically 120 ) at the end farthest from the driver. in multi-receiver applications, st ubs connecting receivers to the main cable should be kept as short as possible. multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at table 2. typical v ih , v il and data rate vs. v l for v cc =3.3v or 5v v l (v) v ih (v) v il (v) isl32177e data rate (mbps) 1.4 0.55 0.5 25 1.6 0.6 0.55 50 1.8 0.8 0.7 65 2.3 1 0.9 70 2.7 1.1 1 75 3.3 1.3 1.2 80 ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
14 fn7529.1 march 14, 2013 both ends. stubs connecting a transmitter or receiver to the main cable should be kept as short as possible. low power shutdown mode these bicmos receivers all use a fraction of the power required by their bipolar counterparts, but they also include a shutdown (shdn) feature that reduces the already low quiescent icc to a microamp trickle. these devices enter shutdown only when all four receivers disable (see ?truth tables? on page 4) for at least 600ns. the isl32x73e types enter shdn whenever en is low and en is high. isl32x75e types enter shdn only if both en12 and en34 are low. note that the isl32x75e enable times increase significantly when enabling from the shdn condition. the isl32x77e enter the low power shdn mode if shdnen is high, and if all four rx are disabled for at least 600ns. this is accomplished by driving en low and en high, or by driving all four enx inputs low. enable times increase if the ic was in shdn, so if enable time is more important than shdn supply current, tying the shdnen pin low defeats the low power shdn feature. in this mode, the supply current drops to 1ma to 2ma when all four rx are disabled, but the enable time of any rx remains below 200ns. remember that all enable pins have pull-up resistors on them, so each pin that is low during shdn adds up to 15a to the shdn supply current. the shdn supply current entries in the ?electrical specifications? table on page 9 include the resistor currents of the pins indicated to be in the low state. ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
15 fn7529.1 march 14, 2013 typical performance curves c l = 15pf, v cc = v l = 3.3v or 5v, t a = +25c; unle ss otherwise specified. v l notes apply to the isl32177e and isl32277e only. figure 5. supply current vs temperature figure 6. v l supply current vs enable pin voltage (isl32x77e only) figure 7. isl3217xe receiver output current vs receiver output voltage figure 8. isl3217xe receiver output current vs receiver output voltage figure 9. isl32177e receiver output current vs receiver output voltage figure 10. isl32177e receiver output current vs receiver output voltage 2 3 4 5 6 7 8 9 10 11 temperature (c) i cc (ma) en = v cc , en = 0v v cc = v l = 5v v cc = v l = 3.3v -40 10 60 -15 35 110 85 125 v cc = v l = 5v v cc = v l = 3.3v isl3217xe isl3227xe 0 20 40 60 80 100 120 140 160 180 01234567 en voltage (v) i l (a) v cc = 5v or 3.3v v l = 3.3v v l = 5v (v cc = 5v only) v l = 2.5v v l 2v data for any 1 enable pin 0 20 40 60 80 100 120 receiver output voltage (v) receiver output current (ma) 0345 2 1 v oh , +25c v ol , +25c v ol , +85c v cc = v l = 5v v oh , +125c v ol , +125c v oh , +85c 0 10 20 30 40 50 60 0 0.5 1.0 1.5 2.0 2.5 3.0 3.3 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 3.3v v oh , +125c v ol , +125c v oh , +85c receiver output current (ma) 0 5 10 15 20 25 30 35 40 0 0.5 1.0 1.5 2.0 2.5 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 2.5v v oh , +125c v ol , +125c receiver output current (ma) v oh , +85c 0 2 4 6 8 10 12 14 16 18 0 0.5 1.0 1.5 1.8 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 1.8v v oh , +125c v ol , +125c receiver output current (ma) v oh , +85c ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
16 fn7529.1 march 14, 2013 figure 11. isl32177e receiver output current vs receiver output voltage figure 12. isl3227xe receiver output current vs receiver output voltage figure 13. isl3227xe receiver output current vs receiver output voltage figure 14. isl32277e receiver output current vs receiver output voltage figure 15. isl32277e receiver output current vs receiver output voltage figure 16. isl32277e receiver output current vs receiver output voltage typical performance curves c l = 15pf, v cc = v l = 3.3v or 5v, t a = +25c; unle ss otherwise specified. v l notes apply to the isl32177e and isl32277e only. 0 1 2 3 4 5 6 7 8 9 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.5 receiver output voltage (v) v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 1.5v v oh , +125c v ol , +125c receiver output current (ma) 10 v oh , +85c v oh , -40c v oh , +25c 0 10 20 30 40 50 60 70 receiver output voltage (v) receiver output current (ma) 0345 2 1 v oh , +25c v ol , +25c v ol , +85c v cc = v l = 5v v oh , +125c v ol , +125c v oh , +85c 0 5 10 15 20 25 30 35 40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.3 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 3.3v v oh , +125c v ol , +125c receiver output current (ma) v oh , +85c 0 5 10 15 20 25 0 0.5 1.0 1.5 2.0 2.5 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 2.5v v oh , +125c v ol , +125c receiver output current (ma) v oh , +85c 0 2 4 6 8 10 0 0.5 1.0 1.5 1.8 receiver output voltage (v) v oh , +25c v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 1.8v v oh , +125c v ol , +125c receiver output current (ma) 11 v oh , +85c 0 1 2 3 4 5 6 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.5 receiver output voltage (v) v ol , +25c v ol , +85c v cc = 5v or 3.3v, v l = 1.5v v oh , +125c v ol , +125c receiver output current (ma) v oh , +85c v oh , -40c v oh , +25c ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
17 fn7529.1 march 14, 2013 figure 17. isl3217xe receiver propagation delay vs temperature figure 18. isl3217xe receiver skew vs temperature figure 19. isl3217xe receiver propagation delay vs temperature figure 20. isl3217xe receiver skew vs temperature figure 21. isl3227xe receiver propagation delay vs temperature figure 22. isl3227xe receiver skew vs temperature typical performance curves c l = 15pf, v cc = v l = 3.3v or 5v, t a = +25c; unle ss otherwise specified. v l notes apply to the isl32177e and isl32277e only. 8 10 12 14 16 18 20 -40 -15 10 35 60 85 110 125 temperature (c) propagation delay (ns) v cc = 5v v l = 2.5v v l = 1.8v v l = 1.5v v l = 5v v l = 3.3v 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -40 -15 10 35 60 85 110 125 temperature (c) skew (ns) |t plh - t phl | v cc = 5v v l = 2.5v v l = 1.8v v l = 1.5v v l = 3.3v v l = 5v 8 10 12 14 16 18 20 -40 -15 10 35 60 85 110 125 temperature (c) propagation delay (ns) v cc = 3.3v v l = 2.5v v l = 1.5v v l = 3.3v v l = 1.8v 0 0.5 1.0 1.5 2.0 2.5 3.0 -40 -15 10 35 60 85 110 125 temperature (c) skew (ns) |t plh - t phl | v cc = 3.3v v l = 2.5v v l = 1.8v v l = 1.5v v l = 3.3v 34 36 38 40 42 44 46 48 50 52 54 -40 -15 10 35 60 85 110 125 temperature (c) propagation delay (ns) v cc = 5v v l = 2.5v v l = 1.8v v l = 1.5v v l = 5v v l = 3.3v 0 1 2 3 4 5 6 7 8 -40 -15 10 35 60 85 110 125 temperature (c) skew (ns) |t plh - t phl | v cc = 5v v l = 1.8v 2.5v v l v cc v l = 1.5v ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
18 fn7529.1 march 14, 2013 figure 23. isl3227xe receiver propagation delay vs temperature figure 24. isl3227xe receiver skew vs temperature figure 25. isl3217xe receiver waveforms figure 26. isl3227xe receiver waveforms figure 27. isl32177e receiver waveforms figure 28. isl32177e receiver waveforms typical performance curves c l = 15pf, v cc = v l = 3.3v or 5v, t a = +25c; unle ss otherwise specified. v l notes apply to the isl32177e and isl32277e only. 32 37 42 47 52 57 -40 -15 10 35 60 85 110 125 temperature (c) propagation delay (ns) v cc = 3.3v v l = 2.5v v l = 1.5v v l = 3.3v v l = 1.8v 0 1 2 3 4 5 6 7 -40 -15 10 35 60 85 110 125 temperature (c) skew (ns) |t plh - t phl | v cc = 3.3v v l = 2.5v v l = 1.8v v l = 1.5v v l = 3.3v time (4ns/div) receiver output (v) 1 -1 0 receiver input (v) a - b 0 1 2 3 4 5 v cc = 3.3v , c l = 15pf v cc = 5v , c l = 6pf 80mbps 0 1 2 3 4 5 time (20ns/div) receiver output (v) 1 -1 0 receiver input (v) a - b v cc = 5v v cc = 3.3v 20mbps 0 1 2 3 4 time (4ns/div) receiver output (v) 1 -1 0 receiver input (v) a - b v cc = 5v v l = 3.3v v l = 2.5v v l = 1.8v v l = 1.6v c l = 6pf 80mbps time (4ns/div) receiver output (v) 1 -1 0 receiver input (v) a - b v cc = 3.3v 0 0.5 1.0 1.5 2.0 2.5 v l = 2.5v v l = 1.8v v l = 1.6v 80mbps ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
19 fn7529.1 march 14, 2013 figure 29. isl32277e receiver waveforms die characteristics substrate and qfn thermal pad potential (powered up): gnd process: si gate bicmos typical performance curves c l = 15pf, v cc = v l = 3.3v or 5v, t a = +25c; unle ss otherwise specified. v l notes apply to the isl32177e and isl32277e only. time (20ns/div) receiver output (v) 1 -1 0 receiver input (v) a - b 0 0.5 1.0 1.5 2.0 2.5 v l = 2.5v v l = 1.8v v l = 1.4v v l = 1.6v 20mbps v cc = 5v or 3.3v ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e
20 fn7529.1 march 14, 2013 ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m m16.15 (jedec ms-012-ac issue c) 16 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.3859 0.3937 9.80 10.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n16 167 0 8 0 8 - rev. 1 6/05
21 fn7529.1 march 14, 2013 ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e package outline drawing l24.4x4c 24 lead quad flat no-lead plastic package rev 2, 10/06 0 . 90 0 . 1 5 c 0 . 2 ref typical recommended land pattern 0 . 05 max. ( 24x 0 . 6 ) detail "x" ( 24x 0 . 25 ) 0 . 00 min. ( 20x 0 . 5 ) ( 2 . 50 ) side view ( 3 . 8 typ ) base plane 4 top view bottom view 7 12 24x 0 . 4 0 . 1 13 4.00 pin 1 18 index area 24 19 4.00 2.5 0.50 20x 4x see detail "x" - 0 . 05 + 0 . 07 24x 0 . 23 2 . 50 0 . 15 pin #1 corner (c 0 . 25) 1 seating plane 0.08 c 0.10 c c 0.10 m c a b a b (4x) 0.15 located within the zone indicated. the pin #1 indentifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes:
22 intersil products are manufactured, assembled and tested utilizing iso9000 qu ality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, th e reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accura te and reliable. however, no re sponsibility is assumed by inte rsil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which ma y result from its use. no licen se is granted by implication o r otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn7529.1 march 14, 2013 for additional products, see www.intersil.com/product_tree ISL32173E, isl32175e, isl32177e , isl32273e, isl32275e, isl32277e thin shrink small outline package family (tssop) n (n/2)+1 (n/2) top view a d 0.20 c 2x b a n/2 lead tips b e1 e 0.25 cab m 1 h pin #1 i.d. 0.05 e c 0.10 c n leads side view 0.10 cab m b c see detail ?x? end view detail x a2 0 - 8 gauge plane 0.25 l a1 a l1 seating plane mdp0044 thin shrink small outline package family symbol millimeters tolerance 14 ld 16 ld 20 ld 24 ld 28 ld a 1.20 1.20 1.20 1.20 1.20 max a1 0.10 0.10 0.10 0.10 0.10 0.05 a2 0.90 0.90 0.90 0.90 0.90 0.05 b 0.25 0.25 0.25 0.25 0.25 +0.05/-0.06 c 0.15 0.15 0.15 0.15 0.15 +0.05/-0.06 d 5.00 5.00 6.50 7.80 9.70 0.10 e 6.40 6.40 6.40 6.40 6.40 basic e1 4.40 4.40 4.40 4.40 4.40 0.10 e 0.65 0.65 0.65 0.65 0.65 basic l 0.60 0.60 0.60 0.60 0.60 0.15 l1 1.00 1.00 1.00 1.00 1.00 reference rev. f 2/07 notes: 1. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 2. dimension ?e1? does not include interlead flash or protrusions. interlead flash and protrusi ons shall not exceed 0.25mm per side. 3. dimensions ?d? and ?e1? are measured at datum plane h. 4. dimensioning and tolerancing per asme y14.5m - 1994.

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